1. Field of the Invention
This invention relates in general to the field of output drivers in semiconductor integrated circuit devices, and more particularly to a CMOS device in a microprocessor for driving an output at one power supply voltage based upon signals from a lower power supply voltage.
2. Description of the Related Art
Conventional microprocessors and their related interface logic devices communicate digitally-coded information over physical connections that must adhere to a standard set of physical and electrical specifications. Those skilled in the art appreciate that these physical and electrical specifications are most often correlated to the particular technology used to fabricate the connected devices. An example device specification is 5-volt complimentary metal-oxide semiconductor (CMOS) logic. 5-volt CMOS devices can be connected together and reliably communicate because their inputs and outputs are at compatible voltage levels.
Advances in integrated circuit fabrication technologies have resulted, though, in the ability to shrink the size of the basic transistor elements that make up an integrated circuit. Consequently, integrated circuit devices are now commonly produced comprising millions of transistors on a single chip. The development of microprocessors has played a prominent role in the scaling of integrated circuit fabrication technologies.
Along with the ability to densely integrate millions of transistors on a single chip, circuit designers have also found that significant improvements in device operating speed and reliability can be realized by operating devices at lower voltage levels. For example, the operating voltage for CMOS devices has migrated from 5 volts to a present standard of 3.3 volts.
Innovations in fabrication technologies continue to permit device designers to populate a chip with more and more transistors. In addition, related enabling technologies make it possible and beneficial to step down the operating voltage for sub-micron CMOS devices. CMOS microprocessors are now being developed that operate at voltages below three volts. Although the core computational logic of these microprocessors is referenced to a lower level voltage, the input/output (I/O) elements of the microprocessors must still provide signals to existing technology peripheral devices. Hence, the I/O elements of these microprocessors generate signals that are referenced to voltage levels compatible with the existing devices.
One of the means to increase device integration while also providing compatibility with existing devices is to provide a microprocessor that operates at two voltage levels. A first (higher) voltage level powers all of the I/O logic on the microprocessor so that it provides compatible I/O signals. A second (lower) voltage level is used to power all of the core computational logic. While this approach solves the external device interface problem, it also presents a similar interface problem internal to the microprocessor: computational logic outputs must be made compatible with I/O logic. That is, an output of the computational logic referenced to the second (lower) voltage level must be translated to the first (higher) voltage level to reliably control the I/O logic.
A split-voltage output driver is commonly used to translate a control signal to a higher voltage level so that it can drive I/O circuitry. The split-voltage output driver uses simple feedback means to perform the voltage translation. The split-voltage output driver is acceptable when used in a dual-voltage microprocessor that runs at slower speeds.
However, a noise problem arises when a scaled microprocessor is operated at higher speeds. Bonding means within the circuit package and power supplies to which the microprocessor is connected both exhibit fixed inductances. Consequently, transitioning device outputs at a faster rate proportionally increases voltage noise levels. Because of this, microprocessor designers provide means to control the transition rate of a microprocessor""s outputs. By controlling the rate at which a microprocessor output changes state, the noise problem is addressed.
Conventional split-voltage output drivers either degrade in operation or fail completely when employed in a microprocessor that provides slew-rate control of its outputs.
In view of the above problem discussion, what is needed is an output driver that receives a control signal referenced to a lower power supply voltage and produces an output referenced to a higher power supply voltage, in the presence of slew-control. In addition, what is needed is a slew-controlled split-voltage output driver that reliably performs voltage level translation.
Accordingly, in the attainment of the aforementioned object, it is a feature of the present invention to provide a slew-controlled split-voltage output driver in a microprocessor, for providing an output signal referenced to a first power supply voltage. The slew-controlled split-voltage output driver includes an output driver circuit, a driver control circuit, and a feedback-enhanced level translator circuit. The output driver circuit drives the output signal to a low level, a high level, or a tri-state level. The output driver circuit has a P-channel source transistor, coupled to the first power supply voltage, and an N-channel sink transistor, connected in series with the P-channel source transistor across the first power supply voltage. The output signal is formed by the connection between drain nodes of the P-channel source and the N-channel sink transistors. The P-channel source transistor pulls the output signal up to the first power supply voltage, thereby referencing the output signal to the first power supply voltage. The driver control circuit is coupled to the first power supply voltage. The driver control circuit receives an enable signal, and employs the enable signal to control turn on and turn off of the N-channel sink transistor, where, to control turn on and turn off, the enable signal must switch to a level essentially equal to the first power supply voltage. The driver control circuit has a first N-channel transistor and slew control logic. The first N-channel transistor is driven by the enable signal, and controls turn off of the N-channel sink transistor. The slew control logic is coupled to the first N-channel transistor. The slew control logic is driven by the enable signal, and senses direction of the enable signal, and turns on slowly and turns off quickly, thereby controlling turn on of the N-channel sink transistor. The feedback-enhanced level translator circuit is coupled to the driver control circuit. The feedback-enhanced level translator circuit receives an output state signal whose high-level state is essentially equal to a second power supply voltage, where the second power supply voltage is at least one half of the first power supply voltage, and where the feedback-enhanced level translator circuit generates the enable signal to the level essentially equal to the first power supply voltage, and where the feedback-enhanced level translator circuit isolates generation of the enable signal from operation of the driver control circuit. The enable signal is directly driven by the output state signal through a second N-channel transistor, where the output state signal is applied to a source node of the second N-channel transistor.
An advantage of the present invention is that a microprocessor employing the present invention can operate reliably at higher operating speeds than has heretofore been achieved.
Another object of the invention is to provide a slew-controlled split-voltage output driver that reliably performs voltage level translation.
In another aspect, it is a feature of the present invention to provide a slew-controlled split-voltage output driver in a microprocessor, for providing an output signal referenced to a first power supply voltage. The slew-controlled split-voltage output driver includes an output driver circuit, a driver control circuit, and a feedback-enhanced level translator circuit. The output driver circuit drives the output signal to a low level, a high level, or a tri-state level. The output signal is pulled up to the first power supply voltage through a P-channel source transistor, thereby referencing the output signal to the first power supply voltage. The driver control circuit is coupled to the output driver circuit and to the first power supply voltage. The driver control circuit receives an enable signal, and employs the enable signal to control turn on and turn off the P-channel source transistor, where, to control turn on and turn off, the enable signal must switch to a level essentially equal to the first power supply voltage. The driver control circuit has a first P-channel transistor and a slew control circuit. The first P-channel transistor is driven by the enable signal, and controls turn off of the P-channel source transistor. The slew control circuit is coupled to the first P-channel transistor, and is driven by the enable signal, and senses direction of the enable signal, and turns on slowly and turns off quickly, thereby controlling turn on of the P-channel source transistor. The feedback-enhanced level translator circuit is coupled to the driver control circuit. The feedback-enhanced level translator circuit receives an output state signal whose high-level state is essentially equal to a second power supply voltage. The second power supply voltage is at least one half of the first power supply voltage. The feedback-enhanced level translator circuit generates the enable signal to the level essentially equal to the first power supply voltage, and the feedback-enhanced level translator circuit isolates generation of the enable signal from operation of the driver control circuit. The enable signal is directly driven by the output state signal through an N-channel transistor, where the output state signal is applied to a source node of the N-channel transistor.
In yet another aspect, it is a feature of the present invention to provide a slew-controlled split-voltage output driver in a microprocessor, for providing an output signal having a high-level essentially equal to a first power supply voltage. The slew-controlled split-voltage output driver includes an output driver circuit, a source driver control circuit, a sink driver control circuit, a first feedback-enhanced level translator circuit, and a second feedback-enhanced level translator circuit. The output driver circuit drives the output signal to a low level, the high level, or a tri-state level. The output driver circuit has a source transistor that is coupled to the first power supply voltage, and a sink transistor, connected in series with the source transistor across the first power supply voltage. The source driver control circuit is coupled to the source transistor of the output driver circuit. The source driver control circuit receives a source enable signal, and slowly turns on and quickly turns off the source transistor; wherein the source enable signal switches to a level essentially equal to the first power supply voltage. The sink driver control circuit is coupled to the sink transistor of the output driver circuit. The sink driver control circuit receives a sink enable signal, and slowly turns on and quickly turns off the sink transistor, where the sink enable signal switches to the level essentially equal to the first power supply voltage. The first feedback-enhanced level translator circuit is coupled to the source driver control circuit. The first feedback-enhanced level translator circuit receives a source output state signal having a high-level state essentially equal to a second power supply voltage, where the first feedback-enhanced level translator circuit generates source enable signal to the level essentially equal to the first power supply voltage, and where the first feedback-enhanced level translator circuit isolates generation of the source enable signal from operation of the source driver control circuit. The source enable signal is directly driven by the source output state signal through a first N-channel transistor, where the source output state signal is applied to a first source node of the first N-channel transistor. The second feedback-enhanced level translator circuit is coupled to the sink driver control circuit. The second feedback-enhanced level translator circuit receives a sink output state signal having a high-level state essentially equal to the second power supply voltage, where the second feedback-enhanced level translator circuit generates the sink enable signal to the level essentially equal to the first power supply voltage, and where the second feedback-enhanced level translator circuit isolates generation of the sink enable signal from operation of the sink driver control circuit. The second power supply voltage is at least one half of the first power supply voltage. The sink enable signal is directly driven by the sink output state signal through a second N-channel transistor, where the sink output state signal is applied to a second source node of the second N-channel transistor.
Another advantage of the present invention is that a lower voltage control signal progresses to produce a higher level output signal whose rate of transition is controlled to minimize voltage noise.